Python Forum

Hello guys. I'm a college student and I'm a total newbie at programming. So apparently based on what I've researched, the following can only be done using verilog hdl programming. But our college professor challenged us to create a program using python language. I just want to ask if it's possible? And how would I play the output in the console? Is it even possible or do I have to install a simulation tool?

A slot machine has 2 panels. Each panel is controlled by a unique clock
frequency. When the start button is pressed, the panels start to rotate until the button is
released.

a) if the combination after 1st release is a 67 or 76, the player wins 1 token/coin –game over.
b) if the combination after first release is a pair of even number , the player is given a chance to press the start button again otherwise game over.
i. During the 2nd try, if the combination obtained is 6 and 6, the contestant is given one last chance to press the start button again. Otherwise game over.
c) if the combination obtained is a 77 regardless if it is 1st try or 2nd try or 3rd try, the contestant wins the jackpot.

Write the synthesizable code for the game machine. Your design should consist of at least the following modules:

a) a 0 to 7 counter.
b) a divided by 2 and divided by 7 frequency divider module for the clock signals that will drive the 2 panels.
c) a controller for the game machine.

What have you been researching, and why do you think it needs to be done in Verilog? The use case for Verilog is very different from what you described, which leads me to believe you're searching for something specific, or there's more requirements to your assignment than you listed.